Capacitance generated between Channel(Source, Drain, Bulk) and Gate. In cutoff there isn’t any channel present and therefore there is Cgc between gate and body. In linear region inversion layer if formed. The Layer is between source and drain. Thus gate to body capacitance is 0 and total Cgc is distributed evenly between source and drain. […]
We have seen CMOS before and we will keep on seeing it as long as we are planning to remotely associate ourselves with VLSI. To recall, why we bother with CMOS at all–Let’s look at the following points. Some History Lesson Kids : Silicon is a Group IV element, so it forms covalent bonds with […]
As the fate might have this, I am here again, a day before my viva, doing VLSI. Welcome to VLSI by an amateur who’s just trying to pass college exams. Warning: I know nothing, everything in this blog may or may not be write–or even make any sense. Taming the beast-Microwind Microwind is a tool […]